This tutorial is all about using the internal timers/counters of the 8051 to produce a delay. The AT89S52 has three (3) 16-bit Timers/Counters that can be used to produce a more accurate delay, rather than approximation like that of the software based delay. These timers has different modes, and functions that can be set thru the SFR registers.
In this tutorial, we will be concerned of Timer0 operating at Mode 1. The important registers that we will look at are the TMOD, THx, TLx and TCON registers.
I. The TMOD Register
The TMOD register is the one responsible for the operation of Timer0 and Timer 1, the lower nibble is for Timer 0 and upper nibble for Timer1.
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| Figure 1: TMOD Register |
a. Gate - Clear to enable Timer x whenever the TRx bit is set. Set to enable Timer x only while the INTx pin is high and TRx bit is set.
b. C/T - Clear for timer operation: timer 1x counts the divided-down system clock. Set for Counter operation: timer x counts negative transitions on external pin Tx.
c. M1/M0 - Timer x mode bits
II. TCON Register
The TCON register is the one responsible for the control of TIMER0 and TIMER1.
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| Figure 2: TCON Register |
a. IT0 -
Interrupt 0 Type Control Bit - Clear to select low level active (level triggered) for external interrupt 0 (INT0#). Set to select falling edge active (edge triggered) for external interrupt 0.
b. IE0 -
Interrupt 0 Edge Flag - Cleared by hardware when interrupt is processed if edge-triggered (see IT0). Set by hardware when external interrupt is detected on INT0# pin.
c. IT1 -
Interrupt 1 Type Control Bit - Clear to select low level active (level triggered) for external interrupt 1 (INT1#).Set to select falling edge active (edge triggered) for external interrupt 1.
d. IE1 -
Interrupt 1 Edge Flag - Cleared by hardware when interrupt is processed if edge-triggered.
Set by hardware when external interrupt is detected on INT1# pin.
e. TR0 -
Timer 0 Run Control Bit - Clear to turn off timer/counter 0. Set to turn on timer/counter 0.
f. TF0 -
Timer 0 Overflow Flag - Cleared by hardware when processor vectors to interrupt routine.
Set by hardware on timer/counter overflow, when the timer 0 register overflows.
g. TR1 -
Timer 1 Run Control Bit - Clear to turn off timer/counter 1. Set to turn on timer/counter 1.
h. TF1 -
Timer 1 Overflow Flag - Cleared by hardware when processor vectors to interrupt routine.
Set by hardware on timer/counter overflow, when the timer 1 register overflows.
III. THx and TLx Register
The THx and TLx registers represent the value of the timer count. The 16 bit count is divided between THx which represents upper byte and TLx which represents lower byte.
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| Figure 3: THx and TLx Register |
Steps in using Mode 1
1. Load TMOD register a value indicating which timer to be used.
2. Load THx and TLx with initial values.
To calculate
XXYY(hex) = 65536 - (delay / (12/xtal freq.))
XX = THx Value
YY = TLx Value
Crystal Frequency is in Hertz.
3. Start timer by setting TRx (TRx = 1).
4. Monitor the Timer flag TFx to see if it is set.
5. Stop timer (TRx = 0)
6. Clear the timer flag for the next round
7. Go back to step 2.
Example: You want to make a 10ms delay with a 3.58MHz crystal using TIMER0.
Lets compute for the value of THx and TLx
XXYY = 65536 - (10x10^-3 / (12/3.58x10^-6)
XXYY = 62553.04
since we have a decimal point, we will drop it
so XXYY = 62553 = 0xF459
THx = 0xF4
TLx = 0x59
Implementation:
#include <at89x52.h>
void delay (void)
{
TMOD = 0x01; //Timer0 Mode 1
TL0 = 0x59; //Computed Value of TLx
TH0 = 0xF4; //Computed Value of THx
TR0 = 1; //Start timer 0
while(!TF0); //Wait for overflow
TR0 = 0; //Stop Timer 0
TF0 = 0; //Clear interrupt flag
}
void main (void)
{
while(1)
{
P2_0 ^= 1;
delay();
}
}
The program above will create a 100Hz square wave at P2.0.
